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Programming Guide
This section provides the details of the programming requirements to operate the MCIO PCIe FMC hardware and customise functionality.
IBERT testing
We are still working on this section.
EEPROM
The 2K EEPROM is intended to store information that identifies the mezzanine card and also specifies the power supplies required by the card. This information is typically read by the system power management on the carrier board when it is powered up. In typical user applications, it should not be necessary to read the data on the EEPROM, and we highly recommend against writing to the EEPROM. Nevertheless, if you wish to access the EEPROM, it can be read and written to at the I2C address 0x50.
| A6 | A5 | A4 | A3 | A2 | A1 | A0 | Hexadecimal |
|---|---|---|---|---|---|---|---|
| 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0x50 |
The FMC pins of the EEPROM’s I2C bus are shown below, and it is up to the user to determine their corresponding connections to the FPGA/MPSoC on the carrier board being used.
| I2C bus signal | FMC pin name | FMC pin number |
|---|---|---|
| SCL (clock) | SCL | C30 |
| SDA (data) | SDA | C31 |
Be aware that on some carrier boards, the FMC I2C bus passes through an I2C MUX. On some boards it connects to
FPGA pins whereas on others it connects to PS pins. If you wish to communicate with the EEPROM, it is necessary
to check the schematic drawing of your carrier board to determine the structure of the I2C bus and to which
pins it connects.
Restoring contents
If you need to reprogram the EEPROM with the original factory contents, you can use the Opsero FMC EEPROM Tool.